I. Field of the Invention
The present invention generally relates to communication systems and, in particular, to systems and methods for efficient buffering and metering of high-speed flows.
II. Background and Material Information
At any point in a typical network, there are numerous flows of information. Specifically, at a communication device, such as a router or switch on the network, there may be various flows of datagrams, packets, or cells. Each flow may be associated with a different connection between a source and a destination. For example, there may be one or more flows associated with Voice Over Internet Protocol (VoIP) calls; other flows may be associated with hypertext transfer protocol (http) exchanges between a source processor and a web server on the Internet; while other flows may represent simple email transfers. Indeed, a telecommunications device, such as a router or switch, may process one, two, or even a thousand or more flows at any given time.
Moreover, at any given time, each of these flows may have a state that defines the flow, such as a data rate and quality of service (QoS) parameters. For example, when compared to other traffic, a VoIP flow may have higher QoS requirements, such as requiring a maximum data rate, a minimum latency, and a maximum packet loss. On the other hand, a flow associated with an email transfer may have much lower QoS requirements, when compared to a VoIP flow. To provide QoS on a flow, a communication device may meter packets. Metering polices or shapes traffic by limiting surges or bursts that congest a network. Metering regulates traffic by buffering packets before they enter a network (or link) resulting in a regulated, controlled amount of packets being sent to the network. In essence, metering provides a gate keeping function that is similar to a traffic light used on a highway on-ramp to “meter” traffic accessing the highway.
Although metering is a relatively simple QoS mechanism, it becomes a very difficult problem at very high data rates because large buffers are required to buffer the packets awaiting metered access to the network. For example, at a data rate of 1 Gigabit per second (Gbps), a buffer size of about 125 Megabytes can store 1 second of packet data. When the data rate increases to 40 Gbps, the buffer size must increase to about 5 Gigabytes to provide the same 1 second of buffering. At 100 Gbps, the buffer size must be at least 12.5 Gigabytes to provide the same 1 second buffer. Although this example describes a 1 second buffer, one of ordinary skill in the art will recognize that any size buffer (e.g., a 100 millisecond buffer) can be used instead. Since the buffer must allow fast memory access and storage—operating faster than the corresponding data rate to provide relatively seamless metering—random access memory, such as SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory), are currently the only practical memory technologies available.
SRAM is a type of memory that is much faster than DRAM with respect to its random access speed. Currently, SRAMs are available with random access times of 2 ns (nanoseconds) and are used, for example, in computer cache memories. On the other hand, DRAMs are currently available with random access times of about 25 ns, such as the so-called FCDRAM devices (available from Toshiba) and RLDRAM devices (available from Micron). Another difference between SRAMs and DRAMs is density. Specifically, the largest SRAMs are usually ¼ to ⅛ the size of the largest comparable DRAMs. However, even if more SRAM devices could be used to make up for the density difference when compared to larger DRAMs, it is not feasible to use more SRAMs, since very fast SRAMs may not be capable of being bussed together due to speed degradation caused by loading multiple devices on the same address, data, or control lines.
Although a buffer using only SRAM may satisfy the speed requirements of a buffer for use in a communication device, an all SRAM buffer would be too expensive since a large amount of buffer capacity is required at higher rates. Moreover, an all-SRAM buffer would operate at too high a temperature. On the other hand, an all-DRAM buffer would be practical from a cost and a heat perspective, but be too slow in terms of data access times. As such, there is a need to provide a practical buffer for use in a communication device that is fast enough to operate at high speeds.